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Entries Tagged ‘cache’

AMD Readies Two More FX Series Processors

AMD launched as many as five new FX Series processor models over the course of Q1, 2012. We’re hearing from DonanimHaber that two more budget models are en route for Q2, 2012, likely April. These include the quad-core FX-4130, and six-core FX-6130. The…

Haswell to Use 4th-Level On-Package Cache to Boost Graphics Performance

Intel is making serious efforts to boost CPU-integrated graphics performance using homegrown architectures, without having to borrow/license any technologies from the other two major players in the PC graphics business that have technological edges ove…

Three New, 95 W AMD FX Series Processors Coming Up

Before the end of this quarter AMD is set to introduce a bunch of fresh FX Series chips, including three boasting a 95 W TDP, the FX-4150 quad-core, the FX-6120 hexa-core and the FX-8140 octo-core.

The FX-4150 features a base clock of 3.9 GHz (4.1 GH…

Intel Centerton Atom A True Single-Chip SoC

Intel has, in the past, referred to its two-chip low-wattage computing solutions as “SoC” (system on a chip), keeping with that trend, it was assumed that “Centerton”, an Atom-derived processor for NAS servers that the company is working on, could be a…

(PR) OCZ Technology Introduces Synapse Cache Series SSDs for High-Performance Caching

OCZ Technology Group, Inc., a leading provider of high-performance solid-state drives (SSDs) for computing devices and systems, today launched its Synapse Cache Series 2.5″ SSDs. The new Synapse SSDs are optimized for caching applications and leverages…

AMD FX Series Processors Up For Pre-Order

At last, AMD’s highly-anticipated performance desktop processors, branded under the FX-Series, are up for pre-order, letting buyers book their chips so they could have it up and running on release date. American retailer Bottom-line Telecommunications …

Intel Ivy Bridge Dual-Core Put Through Clock-to-Clock Benches Against Sandy Bridge

Taiwanese PC enthusiast Coolaler has a new Ivy Bridge LGA1155 dual-core engineering sample to play with, and wasted no time in putting it through some tests. The sample has two cores, four threads with HyperThreading enabled, clock speed of 1.80 GHz, 2…

LGA2011 Sandy Bridge-EP Xeon Processor on Ebay

Intel may be a little over 6 months away from unveiling its new Sandy Bridge-EP platform, but it’s understandable that the company is circulating engineering samples among closely tied industry partners. One such sample fell into the right (wrong, for …

AMD Introduces Phenom II X6 1100T BE, X2 565 BE, Athlon II X3 455

AMD rolled out three new processors today, the six-core Phenom II X6 1100T Black Edition, Athlon II X3 455, and the Phenom II X2 565 Black Edition. The new flagship of AMD’s processor lineup, the Phenom II X6 1100T, is based on the AM3 socket, supporting DDR3 and DDR2 memory on older AM2+ motherboards. It carries a nominal clock speed of 3.30 GHz, is based on the 45 nm “Thuban” silicon, features 512 KB of L2 cache per core, and 6 MB of L3 between all six cores. It features the TurboCore technology, which bumps clock speed by a few hundred MHz when it senses high load. As a Black Edition chip, it features an unlocked bus multiplier. Despite its increased clock speed, the 1100T has a TDP of 125W. This chip goes for US $265.

Next up, is the Phenom II X2 565 Black Edition. Clocked at 3.40 GHz, the X2 565 is based on the Callisto silicon (which is Deneb with two cores locked), featuring 512 KB of cache per core, and 6 MB shared L3 cache. This one has a TDP of 80W, and is priced at US $115. Lastly, there’s the Athlon II X3 455, a triple-core chip based on the “Rana” silicon (which is Propus with one core locked), it lacks an L3 cache, but features 512 KB L2 per core. With a TDP of 95W, this one goes for $87.

AMD Orochi ”Bulldozer” Die Holds 16 MB Cache

Documents related to the “Orochi” 8-core processor by AMD based on its next-generation Bulldozer architecture reveal its cache hierarchy that comes as a bit of a surprise. Earlier this month, at a GlobalFoundries hosted conference, AMD displayed the first die-shot of the Orochi die, which legibly showed key features including the four Bulldozer modules which hold two cores each, and large L2 caches. In coarse visual inspection, the L2 cache of each module seems to cover 35% of its area. L3 cache is located along the center of the die. The documents seen by X-bit Labs reveal that each Bulldozer module has its own 2 MB L2 cache shared between two cores, and an L3 cache shared between all four modules (8 cores) of 8 MB.

This takes the total cache count of Orochi all the way up to 16 MB. This hierarchy suggests that AMD wants to give individual cores access to a large amount of faster cache (that’s a whopping 2048 KB compared to 512 KB per core on Phenom, and 256 KB per core on Core i7), which facilitates faster inter-core, intra-module communication. Inter-module communication is enhanced by the 8 MB L3 cache. Compared to the current “Istanbul” six-core K10-based die, that’s a 77% increase in cache amount for a 33% core count increase, 300% increase in L2 cache per core. Orochi is built on a 32 nm GlobalFoundries process, it is sure to have a very high transistor count.

Source: Xbit Labs